1. Technical Field
The embodiments described herein relate to a data output circuit, and more particularly, to a data output circuit of a semiconductor integrated circuit driven using different supply voltages.
2. Related Art
FIG. 1 is a schematic block diagram of a conventional data output circuit. In FIG. 1, a data output circuit 1 includes a control section 10 and a data driving section 20. The control section 10 is configured to generate driving signals ‘PU’ and ‘PD’ in response to the level of input data ‘DATA_IN’. The data driving section 20 has a driver group that includes a plurality of drivers operated in response to the driving signals ‘PU’ and ‘PD’ and drive output data ‘DATA_OUT’ to the logic level of the input data ‘DATA_IN’.
The standards for semiconductor memories include those for the output impedance of a data output circuit. Hence, a data output circuit must be designed to satisfy the standards for output impedance. The output impedance of a data output circuit is determined by the driving strength of a driver group, which can be adjusted by increasing or decreasing the number of the drivers included in the driver group.
In the conventional data output circuit, when a preset level of supply voltage (VDDQ), for example, 1.8V of supply voltage (VDDQ) is used, the driver group is designed such that output impedance can satisfy the standards.
In semiconductor memory devices, as power efficiencies increase, a supply voltage (VDDQ) gradually decreases. Accordingly, the output impedance of semiconductor memories must satisfy the standards not only when 1.8V of supply voltage (VDDQ) is used but also when 1.2V of supply voltage (VDDQ) is used. However, in the conventional data output circuit, since the driver group is designed to conform to 1.8V of supply voltage (VDDQ), if 1.2V of supply voltage (VDDQ) is used, output impedance cannot have a value satisfying the standards, which causes a problem.
Of course, it is possible to use two data output circuits, which are respectively designed for different supply voltages, that is, 1.8V and 1.2V of supply voltages (VDDQ). Nevertheless, in this case, circuit area increases due to the configuration of the two data output circuits, and since the two data output circuits are commonly connected to data output pins (DQ), pin capacitance is likely to increase.